### Constructing and simulating a digital circuit in logic-sim

• Components and Signals

• Definitions:

• Component = a digital circuit

Example:

 And gate Or gate Multiplexor etc

• Signal = an input or an output of a component

• Schematically:

• Named and unnamed Signals

• Important note:

• Every signal used in the circuit simulation must be defined !!!

• Every signal has a unique identifier

 A signal can optionally has a display name

• Named and unnamed signals:

 Most signals will not be displayed (= shown to the user) The signals that you do want to display will usually receive a display name

• Example: how an unnamed signal is displayed:

• Example: how an named signal (called MyOutput) is displayed:

• Defining signals

• Defining signals:

 ``` Signal signalName; // Defines an unnamed signal Signal signalName( 1, "DisplayName" ); // Define one named signal ("DisplayName") Sig( signalName, 1 ); // Shorthand for: Signal signalName(1, "signalName") ```

Examples:

 ``` Signal a; // Unnamed Signal a(1, "MySignal"); // The signal is identified as "a" and // displayed with the name "MySignal" Sig(a, 1); // The signal is identified as "a" and // displayed with the name "a" ```

• Important note on Signals

• Important Note:

• A Signal typed variable is always an array variable in logic-sim

• Furthermore:

 The signal x[0] is always equal to the signal x

That's why the signal out is displayed as out[0] in the circuit simulation:

• Defining a serie (array) of signals

• Fact:

• We often use a serie of signals

Examples:

 The address bus consists of 32/64 bits (signals) The data bus consists of 32/64 bits (signals)

• Defining multiple signals:

 ``` Signal signalName[N]; // Unnamed Sig( signalName, N ); // Named (shorthand) Defines the signals: signalName[0], signalName[1], ..., signalName[N-1] ```

Examples:

 ``` Signal x[4]; // Defines: x[0], x[1], x[2], x[3] Sig( x, 4 ); // Defines: x[0], x[1], x[2], x[3] ```

• Using an array of signals

• Ways to use an array of signals

• Each individual signal in an array of signals is identified by an index.

Example:

 ``` Signal x[4]; Individual signals: x[0] x[1] x[2] x[3] Sig( x, 4 ); Individual signals: x[0] x[1] x[2] x[3] ```

An individual signal is used just like any ordinary signal

Example:

 ``` Signal x[4]; Signal out1, out2; And("aa", (x[0],x[1]), out1); And("aa", (x[2],x[3]), out2); ```

• You can pass an entire array as parameter to a (C) function (component)

Example:

 ``` Signal x[4]; Signal out; And("aa", x, out1); // Same as: And("aa", (x[3],x[2],x[1],x[0]), out); ```

• Components

• You can use 2 types of components in your digital simulation:

 Built-in components User-defined components

• Some common built-in components:

 And gate Or gate Mux (multiplexor) ...

• Defining components

• Syntax to define a componet:

 ``` ComponentName ( Coord, Input-Signal(s), Output-Signal(s), other-params ) ; ```

Note:

• The coord is the coordinate on a grid

• The coord has the following format:

 ``` "xy" ```

• The coordinate system is as follows:

• The input-signal(s) and output-signal(s) are Signal typed variables that must have been defined before they can be used !!!

• Example:

 ``` Sig(sw0,1); Sig(sw1,1); Sig(out,1); Switch ( "aa", sw0, 'a', Zero ); // Location = "aa", name = sw0, key = 'a' Switch ( "ca", sw1, 'b', One ); // Initial value: Zero or One And ( "bb", (sw0,sw1), out ); // And: inputs = (sw0,sw1), output = out Probe ( "bc", out ); // Probe out ```

Placement of the various components:

• Connecting components

• Fact:

• The output of a component is connected to the input of another component

 You cannot connect the output of a component to the output of another component !!!

• Connecting the output of a Component1 to the input of another Component2:

 ``` Sig(signalX,1); Component1( coord1, ..., signalX ); // SignalX is the output signal of Component1 Component2( coord2, signalX, ... ); // SignalX is the input signal of Component2 ```

• Example:

 ``` Signal sw0, sw1, out; Switch ( "aa", sw0, 'a', Zero ); ^^ Output signal of a switch Switch ( "ca", sw1, 'b', One ); ^^ Output signal of a switch And ( "bb", (sw0,sw1), out ); ^^^^^^^ Input signals of the And gate Probe ( "bc", out ); ```

Resulting connection made by the red signals:

• Common error in connecting components: connection outputs of different components together

• Warning:

 You cannot (except in the case of tri-state-buffers) connect the outputs of components together.

• When are outputs of different components connected together:

 The outputs of components are connected together if the signal variable used in the output of the components are the same

Example:

 ``` And ( "bb", ...., out ); // output = out Or ( "bc", ...., out ); // output = out ```

• Example Program: (Demo above code)

How to run the program:

 Right click on link and save in a scratch directory To compile:   cs355sim andx To run:          ./simex

Error message:

• The program will compile

• When the circuit simulation is run, you need see this error message:

 ``` Error (outputConectivityError): Signal[4] name = UnNamed[0] const plus source or two sources, cmp = 3 name = Or at bc There are 1 outputConnectivityErrors--Unable to Continue. ```

• Displaying the internal display labels of the connections/signals

• Fact:

 You can use the function key F5 to toggle the display of the signal labels

• Example: run the circuit simulation in the previous example

Press the function key F5 and you will see the following:

• Note:

 Yo do not want to display the signal labels because you will use many signals in your projects I tell you this because it will give you some idea on how the circuit simulation works....

• Grouping signals

• Grouping (existing) signals

• After defining the signals:

 ``` Sig(a, 10); // Signals: a[0], a[1], ........., a[9] Sig(b, 5); // Signals: b[0], b[1], ..., b[4] ```

you can group some of the signals together:

 ``` ( signal1, signal2, ..., signalN ) = a group of signals A group of signal "counts" as ONE single signal !! ```

This is just like Java:

 ``` { Statement1; Statement2; // "Counts" as ONE single statement !!! ... StatementN; } ```

• Example:

• The And-gate has the following syntax:

 ``` And( Coord, InputSignal, OutputSignal ); ```

The InputSignal consists of only one signal !!!

• To use an input of two signals to the And-gate, we group the input signals as follows:

 ``` And ( Coord, ( input1, input2 ), output ); ```

• Example Program: (Demo above code)

How to run the program:

 Right click on link and save in a scratch directory To compile:   cs355sim and To run:          ./simex

• Signal notation

• Fact:

• Often, a group of signals is composed of signals from different sources

• When we compose a group of signals, we often use a sub-range of signals from different sources

 In logic-sim, there is a convenient way to denote sub-range of the signal array.

• Recall:

 ``` Sig( a, 10 ); // Define a range of signals: a[0] ... b[9] Sig( b, 5 ); // Define signals: b[0] .. b[4] ```

• We can compose a group of signals using a range notation x[i]-x[j] as follows:

 ``` (a[0]-a[3]) means: a[0], a[1], a[2], a[3] (4 signals !) (a[3]-a[0]) means: a[3], a[2], a[1], a[0] (4 signals !) (a[0],a[3]) means: a[0], a[3] (2 signals !) (a[3],a[0]) means: a[3], a[0] (2 signals !) ```

• I will show you an example of range-notation of signals later (in the next webpage) where we discuss how to use the Multiplexor component in the logic simulator