- Throughout the discussion of the synchronization using
interrupts, I have used examples that involves
exactly one interrupting device...
In the IO example, the DMA device was the only interrupting device.
And in the multi-porgramming example, the timer device was the
only interrupting device.
I did this to simplify the discussion and allow you to focus on the
most important issue, which is the interrupt handling technique.
From the previous 2 examples, you can readily see that the
interrupt handling routines for the 2 different devices
(DMA and Timer) are different.
Admittedly, the two routines have a strong resemblance:
they both send out interrupt acknowledgements, and manipulate
queues (linked list). But the programs are different and
achieve different results.
You can't use the interrupt handler for the DMA to handle interrupt
requests for the Timer and vice versa !
- In a computer system, there will be many devices that
can (and will) emit interrupt requests and
each device will have a corresponding
routine that must be executed by the CPU
in response to the interrupt signal of that device
If you have ever installed new hardware on your PC, you
must have noticed that in addition to adding the hardware,
you may sometimes need to insert a CD (or a floppy).
Windows will look for the best driver for the IO device.
The driver contains the interrupt handler for that device -
so interrupt handlers (subroutines) are
extremely device dependent...
- The following figure depicts the problem that we need to address:
- We have multiple devices in the computer system (in the figure: DMA, Timer)
- Each device has its own interrupt handling routine (installed
somewhere inside the operating system)
- When a device sends an interrupt signal, the CPU must
run the appropriate interrupt handling routine
How does the CPU identify the (starting address of the) appropriate
interrupt handling routine ???
- The technique used in the computer system to identify the interrupting
device is called vector interrupt
When you boot up your PC, look closely at the messages
(press the PAUSE key to freeze the screen if necessary).
You may see the following messages at boot time (startup):
Device No. ... Vendor ID Device ID Device Class IRQ
7 1106 0571 IDE Controller 14
11 11F6 2011 Network Contoller 11
Each device is assigned a unique Interrupt Vector Number
(Microsoft windows calls it Interrupt Request Number or IRQ).
The Interrupt Vector is a (small) index - like
an index of an array variable.
- Here is how the interrupt vector is used to determine
the (starting address of the) interrupt routine
of the interrupting device quickly.
First, I need to tell you that the Interrupt Base Register
does not really contain the address of an interrupt handling
routine (I did that to simplify the discussion on interrupt handling),
but it actually contain the base address of an array
(An array is also known as a vector in computer science,
hence the name "interrupt vector")
The array contains the starting address of interrupt handling
routines for various devices.
The following figure shows how the array of addresses is used
to organize the interrupt handling routines:
- The starting address of the interrupt handling routing of a device
with interrupt vector number i is stored in
the ith entry of the array.
- Recall from CS255 that an address is 32 bits (= 4 bytes)
- You can see that the starting address of the interrupt routine
for the DMA device (which has the interrupt vector 4)
is stored in the 4th entry of the address array.
- The Interrupt Base Register contains the base address of the
(that's why it has "Base" in its name).
- The follow events will take place in an interrupt handling:
- Some device sends an interrupt (let's assume that it was the Timer device)
- Note: there is usually only one interrupt signal pin, so
the CPU can't tell from the interrupt signal that it was the
timer that was interrupting.
- Some computers have multiple interrupt pins, but the pins are not
used to identify devices, but to assign
- The CPU sends the interrupt acknowledge:
- The device that is sending out an interrupt signal reacts
to the interrupt acknowlegde by removing its interrupt signal
and sending out its vector number on the data bus
to the CPU:
- Note: if multiple devices are sending interrupt signal simultaneously,
the device with the highest priority
(see: click here)
will react on the interrupt.
- The CPU then read the starting address of the interrupt
handling routine from the address table into the PC
(thus making a subroutine call to the interrupt handling
- The interrupt handling routines are unchanged
- The vector interrupt mechanism is solely used to
identify a routine (that the CPU will run)
- Does not affect the content of the interrupt handling routine.